Contents of Registers

Contents of registers during fetch-execute cycle

GASP in use showing how registers are linked

GASP shows how the fetch-execute cycle operates in processors with von Neumann architecture (in which instructions and data are held in the same memory). A register is a temporary storage location and is much faster to access than main memory. The following table summarises the uses of the special-purpose registers. You will learn more by running a few examples.

Table 1. Uses of Special Registers
Initials	Name	Contents
PC	Program Counter	Address of next instruction (1 to 25 in GASP). Incremented when contents are copied to MAR. Will be changed later in cycle if the operation is a jump.
MAR	Memory Address Register	Takes address of next instruction from PC. Must contain address of memory location when loading from memory or storing to memory.
MDR	Memory Data Register	Takes instruction from memory. Data stored in or loaded from memory must do so via MDR.
CIR	Current Instruction Register	Takes instruction from MDR, to be decoded.

These special-purpose registers are used in every fetch-execute cycle without appearing in any of your assembler instructions. In contrast, the general-purpose registers AX and BX are available to be used as operands in your instructions. The 'A' in 'AX' derives from its intended use as an accumulator, for holding temporarily results of calculations. BX will work in the same way, but is usually used as an auxiliary register, say for holding an address (for indirect addressing) or a decrementing count. See the next page and the sample programs for examples.

The arithmetic logic unit (ALU) performs (in GASP) addition, subtraction and comparison operations.

Introduction to the Graphical Assembler Simulator Program (GASP)